FPGA Implementation of Quadtree Partitioning Iterated Function Systems Applied to Medical Images

Owing to the growth of technology there is a need for high performance and high capacity systems to efficiently utilize the bandwidth during transmission of images. Hence Compression of medical Images is required for data storage and transmission. One such compression algorithms which is found effective for medical images is fractal image compression. Fractal image compression (FIC) is a lossy compression method. In fractal image compression, an image is coded as a set of contractive transformations in a complete metric space. The set of contractive transformations is guaranteed to produce an approximation to the original image. The demerits of this technique are that it has a long encoding time and a short decoding time. This paper addresses this problem through an optimal technique for Fractal image compression. An effective architecture for Quad-tree based partitioning of images is Modeled using HDL and synthesized using Xilinx 13.1 ISE simulator. This reduces the implementation cost as well as design time cycle The developed HDL design operates at 139.99 MHz and consumes less than 2W on Virtex 5-FPGA Board (XC5VLX110t-FF1136).The results showed that using the architecture designed for quad-tree Partitioning of image the encoding time was reduced considerably to 2.775 ns when compared to the SOFTWARE implementation of quad-tree Fractal Image Compression using Matlab. The architecture is designed for an 8 × 8 image and can be extended for any size image.